CS184a

Definitions and explanations for unfamiliar terms

Day 2: January 8, 2003
- Standard Cell: A semi-custom VLSI design methodology where gates (ands, ors, xors, registers...) are taken from a standard library. These are typically arranged into rows with routing occuring in between the rows. In CS137a:Day 2 slides, on page 6 (slide 12), a typical standard-cell row is shown. In CS137a:Day 13, page 5 shows a couple of standard-cell rows.
- FPGA: Field-Programmable Gate Array -- intended to be like Gate-Arrays, but customizable by the end-user. These days, almost all FPGAs are customizable with memory bits (typical SRAM). We'll be developing quite a bit more about FPGAs during this class. See the FPGA side-bar on p. 42 of this article for a slightly longer description.
- reconvergent fanout: When the output of a gate is used by multiple other gates in the netlist, that's fanout. If we do a reachability trace through the gates which receive the same signal and we reach the same gate through multiple paths, then we say the fanout reconverges. Simplest example: t=a*b; q=t*d; r=t*e; s=q+r. t fans out to q and r. t's fanouts reconverge at s.
Day 3: January 13, 2003
- AP&R: Automatic Place and Route -- i.e. CAD tools for physical design.
Day 6: January 22, 2003
- Doping: Adding impurities to a neutral (typically silicon) lattice to bias conduction. You might try Britney's guide to Semiconductor Basics. :-)
- Tunnelling: here's a nice description with a picture. In class we were talking about electrons tunneling across the insulator which we would normally expect to be separating conductors in a nanoscale systems.
Day 7: January 24, 2003
- Flynn's Taxonomy: Michael J. Flynn, ``Some Computer Organizations and Their Effectiveness,'' IEEE Transactions on Computers, C-21:9 pp. 948--960, 1972.
- VLIW: Very Long Instruction Word -- e.g.
  - Joseph A. Fisher, ``Very Long Instruction Word Architectures and the ELI-512,'' In The Tenth International Symposium on Computer Architecture, 1983.
  - Joseph A. Fisher, ``Retrospective: Very Long Instruction Word Architectures and the ELI-512,'' In 25 Years of the International Symposia on Computer Architecture: Selected Papers, pp. 34--36, 1998.
  We will examin VLIW more closely in the spring term.
- MSIMD: Multiple Control Stream, Single Instruction Multiple Data architecture. What you get if you allow portions of a SIMD machine to run with separate Instruction streams and separate program counter.
- Who is Lazarus Long?: Heinlein character introduced in Methuseluh's Children. He is the oldest living human being. The particular quote used in class appears in the ``Notebooks of Lazarus Long,'' which appear in Time Enough for Love.
Day 8: January 27, 2003
- Edit Distance -- A measure of how far apart two strings are; How many ``edit'' operations are required to change one string into the other. See Day 6 slides from the Reconfigurable Computing class I taught at Berkeley in 1997.
- LE -- Logic Element -- what Altera calls their logic blocks. Contains a bit more logic than a 4-LUT (but not much).
- CLB -- Configurable Logic Block -- what Xilinx calls their logic blocks. What's actually contained in it varies from family to family. It started out just as a 4-LUT and FF like the simple mode we used and has evolved quite a bit. In any case, this is the thing which lives at the leaf of their network. We'll talk more on Wednesday and Friday about some of the reasons why leaf logic blocks are more than just 4-LUTs (4-LUTs with FFs).
Day 9: January 29, 2003
- sbox -- switchbox. This is the thing marked with an "S" on slide 9. We will talk more about switchboxes and their organization when we get to interconnect.
- Does flowmap/chortle = synplify? -- Logically both Chortle and Flowmap do covering of logic into k-LUTs. Maybe sis+flowmap comes close to approximating synplify. sis is a large collection of tools for multi-level logic optimization from UCB.
Day 11: Februrary 3, 2003
- ASIC -- Application Specific Integrated Circuit -- Generically can be used to refer to a gate-array or standard-cell design, typically one that is targetted to a particular purpose or task (not generally programmable). In class today, was used to refer to a non-FPGA/programmable device to contrast the numbers we had for FPGAs.
Day 12: Februrary 5, 2003
- Wirelength -- The wirelength development (taking derivatives of IOs out of regions and integrating to compute expected wirelengths) is developed in the following two papers.
  - Wilm E. Donath, Placement and Average Interconnection Lengths of Computer Logic, IEEE Transactions on Circuits and Systems, 26:4, pp. 272--277, 1979.
  - Michael Feuer, Connectivity of Random Logic, IEEE Transactions on Computers, C31:1, pp. 29--33, 1982.
  My presentation followed the general outline of the Feuer development, but I was much more informal in an attempt to build the intuition without getting even more bogged down in the math.
Day 16: Februrary 14, 2003
- BFT (Butterfly Fat Tree) -- See the Leiserson paper handed out on Day 11 (VLSI Theory and Parallel Supercomputing).
- HSRA (Hierarchical Synchronous Reconfigurable Array -- Topologically, this is essentially a BFT. See HSRA: High-Speed, Hierarchical Synchronous Reconfigurable Array
- How important is the math here? -- In general, it's important to know how things will grow. We're going through the math to get those answers. In some cases the conclusions are non-intuitive. In most of these cases, what's important is to see when these sums converge to constants. So, you should (a) take away the conclusions, and (b) know the general way we attack these problems.
Day 20: March 3, 2003
- UART -- Universal Asynchronous Receiver Transmitter -- this is component that you typically use to interface to a serial line (RS-232).